As electronic devices, typically integrated circuits, become faster, more complex, and of denser design, testing such devices during manufacture to eliminate defective devices has become more important. Such testing is needed to ensure that the product in which the electronic devices are used performs in accordance with its performance specifications. As used in this disclosure, the term manufacturing encompasses manufacturing the electronic devices themselves and manufacturing sub-assemblies, such as printed circuit boards, and products in which the electronic devices are used. Notwithstanding their increased performance and capability, the average selling price of electronic devices has steadily declined over the years. This has driven a relentless effort by manufacturers to reduce manufacturing costs. The effort has been highly successful in producing a steep decline in device fabrication costs. However, conventional testing techniques require time, equipment, and personnel resources whose costs have not declined as steeply as device fabrication costs. As a result, the cost of testing has come to represent an increasing fraction of the overall manufacturing cost. Additionally, in-service testing of products in which electronic devices are used is increasingly being used to ensure that the performance of the product is maintained throughout its service life.
High-speed digital input-output systems comprising I/O circuits are critical components of many electronic devices used in such applications as telecommunications and information processing. As used in this disclosure, the term I/O circuit will be taken to refer to either or both of a transmitter circuit and a receiver circuit. Although I/O circuits transmit or receive signals representing digital data, the behavior of such circuits is essentially that of an analog circuit. This is especially so as the data rate at which the I/O circuit transmits or receives increases. Effective testing of high-speed I/O circuits therefore increasingly relies on determining analog parameters.
The proper operation of an I/O circuit to transmit or receive signals representing digital data depends not only on the operation of the I/O circuit itself, but additionally on the properties of the transmission line or lines and connectors connected to the I/O circuit. Thus, parametric performance measurements of I/O circuits often must take account of phenomena such as parasitic capacitance, heat effects, electromagnetic interference, signal reflection and loss-induced distortion.
A current trend is to try to reduce the cost of testing complex electronic devices by including test circuits on the same chip. However, testing the I/O circuits of complex electronic devices using conventional on-chip test techniques often requires that analog-to-digital (A/D) converters or other sensitive analog circuits be located on the chip. Such on-chip testing circuits are often problematic in that they typically occupy too much die area and consume too much power. Moreover, it is often difficult and expensive to provide such on-chip testing circuits with sufficient speed to allow them to check the dynamic performance of the I/O circuits. Incorporating on-chip testing circuits capable of effectively testing I/O circuits adds additional expense and complexity. An I/O circuit testing technique that occupies relatively little die area, that has low power consumption and that is capable of effectively testing analog performance parameters is desirable.
Current testing of I/O circuits typically focuses only transmitter circuits, and typically does not test receiver circuits. This is because many receiver circuits do not provide any practical test access for measuring the signal output by the receiver circuit. Accordingly, what is additionally needed is an effective way to test receiver circuits.